Monolithic microwave integrated circuits (MMIC's) have a variety of applications and are used quite extensively in the wireless industry. Hermetic ceramic packages have been used for some time for the long-term protection of GaAs-based MMIC's but have considerable tradeoffs in both cost and weight. A low-cost light weight alternative can be offered by plastic packaging without compromising long-term device reliability. This is possible through the use of polymers for construction of the cavity as well as filler materials to form a barrier to moisture transport in the packaging cavity. As can be appreciated by one of ordinary skill in the art, it is necessary for long-term reliability to have necessary protection against moisture. While the use of these polymers in packaging applications has virtually no effect on the electrical performance of low-frequency devices, the relatively high dielectric permittivity and loss tangent of these polymers can cause a substantial degradation in the electrical performance of high-frequency analog MMIC'S. To this end, parasitic elements such as parasitic capacitance and parasitic inductance must be minimized as greatly as possible in order to avoid the deleterious effects of these parasitic elements. To this end, parasitic capacitance can cause frequency shifts and Q-factor deterioration as well as impedance matching problems, to name a few.
While many microwave control devices, for example switches and attenuators, are rendered less sensitive to fillers and moisture by the avoidance of the use of air bridges as well as by adding a final coating of silicon nitride, most analog devices, however, not only contain air bridges, but are also sensitive to the detuning effects of dielectric coatings. Since there is no practical way of accurately modeling arbitrarily shaped coatings of undefined thickness, it is very difficult to predict with any certainty any electrical performance perturbations of filler materials in MMIC chips prior to chip mounting, package closure and filling.
In addition to conventional interconnection and packaging of MMIC's, it is often necessary to utilize flip-chip die attach technology in order to properly thermally dissipate joule heat during operation and also reduce parasitic inductance effects. To this end, the use of hard or solder bumps on the device bonding pads reduces the area of the overall IC as well as eliminates the use of wire bonds which not only increase the labor input to the device, but also increase the potential for parasitic inductance problems. Additionally, the use of solder bumps enables a much better alignment of a device as well as improves the electrical performance of the device through the elimination of parasitic inductance as well as impedance mismatch problems. While flip-chip mounting of the IC to the carrier substrate has the attendant benefits of an improvement in electrical performance as well as better dissipation of heat, an inherent mechanical stress develops between the carrier substrate and the chip which is often unacceptable. One way to alleviate the stress between the carrier substrate and the chip is with the use of a conventional underfill, which is often a liquid polymer. Unfortunately, the underfill, while alleviating mechanical stress, often changes device performance as the dielectric permittivity of the underfill changes the FET internode capacitances. As stated above, in high frequency applications, parasitic capacitances must be minimized wherever possible, and with the use of an underfill it is very difficult to accurately model the effects of the underfill on the electrical performance and account for it.
Accordingly, what is needed is a technique for hermetically coating the MMIC in a manner which will enable the flip-chip bonding of the integrated circuit to the carrier substrate for ultimate packaging in a manner which will not degrade the electrical performance of the integrated circuit when the underfill material is used.